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Registers in Cypress Semiconductor /psoc63 /BLE /BLELL

  1. ACCU_WINDOW_WIDEN_STATUS
  2. ADV_ACCADDR_H
  3. ADV_ACCADDR_L
  4. ADV_CH_TX_POWER_LVL_LS
  5. ADV_CH_TX_POWER_LVL_MS
  6. ADV_CONFIG
  7. ADV_INTERVAL_TIMEOUT
  8. ADV_INTR
  9. ADV_NEXT_INSTANT
  10. ADV_PARAMS
  11. ADV_RAND
  12. ADV_SCN_RSP_TX_FIFO
  13. ADV_TX_DATA_FIFO
  14. BT_SLOT_CAPT_STATUS
  15. CE_CNFG_STS_REGISTER
  16. CE_CNFG_STS_REGISTER_EXT
  17. CE_LENGTH
  18. CLOCK_CONFIG
  19. COMMAND_REGISTER
  20. CONN_1_CE_DATA_LIST_CFG
  21. CONN_1_DATA_LIST_ACK
  22. CONN_1_DATA_LIST_SENT
  23. CONN_1_PARAM_MEM_BASE_ADDR
  24. CONN_2_CE_DATA_LIST_CFG
  25. CONN_2_DATA_LIST_ACK
  26. CONN_2_DATA_LIST_SENT
  27. CONN_2_PARAM_MEM_BASE_ADDR
  28. CONN_3_CE_DATA_LIST_CFG
  29. CONN_3_DATA_LIST_ACK
  30. CONN_3_DATA_LIST_SENT
  31. CONN_3_PARAM_MEM_BASE_ADDR
  32. CONN_4_CE_DATA_LIST_CFG
  33. CONN_4_DATA_LIST_ACK
  34. CONN_4_DATA_LIST_SENT
  35. CONN_4_PARAM_MEM_BASE_ADDR
  36. CONN_CE_COUNTER
  37. CONN_CE_INSTANT
  38. CONN_CH_TX_POWER_LVL_LS
  39. CONN_CH_TX_POWER_LVL_MS
  40. CONN_CONFIG
  41. CONN_CONFIG_EXT
  42. CONN_EXT_INTR
  43. CONN_EXT_INTR_MASK
  44. CONN_INDEX
  45. CONN_INTERVAL
  46. CONN_INTR
  47. CONN_INTR_MASK
  48. CONN_NI_STATUS
  49. CONN_PARAM1
  50. CONN_PARAM2
  51. CONN_PARAM_ACC_WIN_WIDEN
  52. CONN_PARAM_NEXT_SUP_TO
  53. CONN_REQ_WORD0
  54. CONN_REQ_WORD1
  55. CONN_REQ_WORD10
  56. CONN_REQ_WORD11
  57. CONN_REQ_WORD2
  58. CONN_REQ_WORD3
  59. CONN_REQ_WORD4
  60. CONN_REQ_WORD5
  61. CONN_REQ_WORD6
  62. CONN_REQ_WORD7
  63. CONN_REQ_WORD8
  64. CONN_REQ_WORD9
  65. CONN_RXMEM_BASE_ADDR_DLE
  66. CONN_RX_PKT_CNTR[0]
  67. CONN_RX_PKT_CNTR[1]
  68. CONN_RX_PKT_CNTR[2]
  69. CONN_RX_PKT_CNTR[3]
  70. CONN_RX_PKT_CNTR[4]
  71. CONN_RX_PKT_CNTR[5]
  72. CONN_RX_PKT_CNTR[6]
  73. CONN_RX_PKT_CNTR[7]
  74. CONN_STATUS
  75. CONN_TXMEM_BASE_ADDR_DLE
  76. CONN_UPDATE_NEW_INTERVAL
  77. CONN_UPDATE_NEW_LATENCY
  78. CONN_UPDATE_NEW_SL_INTERVAL
  79. CONN_UPDATE_NEW_SUP_TO
  80. DATA_CHANNELS_H0
  81. DATA_CHANNELS_H1
  82. DATA_CHANNELS_L0
  83. DATA_CHANNELS_L1
  84. DATA_CHANNELS_M0
  85. DATA_CHANNELS_M1
  86. DATA_LIST_ACK_UPDATE__STATUS
  87. DATA_LIST_SENT_UPDATE__STATUS
  88. DATA_MEM_DESCRIPTOR[0]
  89. DATA_MEM_DESCRIPTOR[1]
  90. DATA_MEM_DESCRIPTOR[2]
  91. DATA_MEM_DESCRIPTOR[3]
  92. DATA_MEM_DESCRIPTOR[4]
  93. DEVICE_RAND_ADDR_H
  94. DEVICE_RAND_ADDR_L
  95. DEVICE_RAND_ADDR_M
  96. DEV_PA_ADDR_H
  97. DEV_PA_ADDR_L
  98. DEV_PA_ADDR_M
  99. DEV_PUB_ADDR_H
  100. DEV_PUB_ADDR_L
  101. DEV_PUB_ADDR_M
  102. DPLL_CONFIG
  103. DTM_RX_PKT_COUNT
  104. EARLY_INTR_NI
  105. EARLY_INTR_STATUS
  106. EVENT_ENABLE
  107. EVENT_INTR
  108. EXT_PA_LNA_DLY_CNFG
  109. HW_LOAD_OFFSET
  110. INIT_CONFIG
  111. INIT_INTERVAL
  112. INIT_INTR
  113. INIT_NEXT_INSTANT
  114. INIT_NI_VAL
  115. INIT_PARAM
  116. INIT_SCN_ADV_RX_FIFO
  117. INIT_WINDOW
  118. INIT_WINDOW_NI_ANCHOR_PT
  119. INIT_WINDOW_OFFSET
  120. INIT_WINDOW_TIMER_CTRL
  121. LE_PING_TIMER_ADDR
  122. LE_PING_TIMER_NEXT_EXP
  123. LE_PING_TIMER_OFFSET
  124. LE_PING_TIMER_WRAP_COUNT
  125. LE_RF_TEST_MODE
  126. LE_RF_TEST_MODE_EXT
  127. LL_CONFIG
  128. LL_CONTROL
  129. LL_DBG_1
  130. LL_DBG_10
  131. LL_DBG_2
  132. LL_DBG_3
  133. LL_DBG_4
  134. LL_DBG_5
  135. LL_DBG_6
  136. LL_DBG_7
  137. LL_DBG_8
  138. LL_DBG_9
  139. LLH_FEATURE_CONFIG
  140. MMMS_ADVCH_NI_ABORT
  141. MMMS_ADVCH_NI_ENABLE
  142. MMMS_ADVCH_NI_VALID
  143. MMMS_CONFIG
  144. MMMS_CONN_STATUS
  145. MMMS_DATA_MEM_DESCRIPTOR[0]
  146. MMMS_DATA_MEM_DESCRIPTOR[1]
  147. MMMS_DATA_MEM_DESCRIPTOR[10]
  148. MMMS_DATA_MEM_DESCRIPTOR[11]
  149. MMMS_DATA_MEM_DESCRIPTOR[12]
  150. MMMS_DATA_MEM_DESCRIPTOR[13]
  151. MMMS_DATA_MEM_DESCRIPTOR[14]
  152. MMMS_DATA_MEM_DESCRIPTOR[15]
  153. MMMS_DATA_MEM_DESCRIPTOR[2]
  154. MMMS_DATA_MEM_DESCRIPTOR[3]
  155. MMMS_DATA_MEM_DESCRIPTOR[4]
  156. MMMS_DATA_MEM_DESCRIPTOR[5]
  157. MMMS_DATA_MEM_DESCRIPTOR[6]
  158. MMMS_DATA_MEM_DESCRIPTOR[7]
  159. MMMS_DATA_MEM_DESCRIPTOR[8]
  160. MMMS_DATA_MEM_DESCRIPTOR[9]
  161. MMMS_MASTER_CREATE_BT_CAPT
  162. MMMS_RX_PKT_CNTR
  163. MMMS_SLAVE_CREATE_BT_CAPT
  164. MMMS_SLAVE_CREATE_US_CAPT
  165. NEXT_CE_INSTANT
  166. NEXT_CONN
  167. NEXT_RESP_TIMER_EXP
  168. NEXT_SUP_TO
  169. NEXT_SUP_TO_STATUS
  170. NI_ABORT
  171. NI_TIMER
  172. OFFSET_TO_FIRST_INSTANT
  173. PDU_ACCESS_ADDR_H_REGISTER
  174. PDU_ACCESS_ADDR_L_REGISTER
  175. PDU_RESP_TIMER
  176. PEER_ADDR_H
  177. PEER_ADDR_INIT_H
  178. PEER_ADDR_INIT_L
  179. PEER_ADDR_INIT_M
  180. PEER_ADDR_L
  181. PEER_ADDR_M
  182. PEER_SEC_ADDR_ADV_H
  183. PEER_SEC_ADDR_ADV_L
  184. PEER_SEC_ADDR_ADV_M
  185. POC_REG__TIM_CONTROL
  186. RECEIVE_TRIG_CTRL
  187. RSLV_LIST_ENABLE[0]
  188. RSLV_LIST_ENABLE[1]
  189. RSLV_LIST_ENABLE[10]
  190. RSLV_LIST_ENABLE[11]
  191. RSLV_LIST_ENABLE[12]
  192. RSLV_LIST_ENABLE[13]
  193. RSLV_LIST_ENABLE[14]
  194. RSLV_LIST_ENABLE[15]
  195. RSLV_LIST_ENABLE[2]
  196. RSLV_LIST_ENABLE[3]
  197. RSLV_LIST_ENABLE[4]
  198. RSLV_LIST_ENABLE[5]
  199. RSLV_LIST_ENABLE[6]
  200. RSLV_LIST_ENABLE[7]
  201. RSLV_LIST_ENABLE[8]
  202. RSLV_LIST_ENABLE[9]
  203. RSLV_LIST_PEER_IDNTT_BASE_ADDR
  204. RSLV_LIST_PEER_RPA_BASE_ADDR
  205. RSLV_LIST_RCVD_INIT_RPA_BASE_ADDR
  206. RSLV_LIST_TX_INIT_RPA_BASE_ADDR
  207. SCAN_CONFIG
  208. SCAN_INTERVAL
  209. SCAN_INTR
  210. SCAN_NEXT_INSTANT
  211. SCAN_PARAM
  212. SCAN_WINDOW
  213. SLAVE_LATENCY
  214. SLAVE_TIMING_CONTROL
  215. SL_CONN_INTERVAL
  216. SLV_WIN_ADJ
  217. SUP_TIMEOUT
  218. TIM_COUNTER_L
  219. TRANSMIT_WINDOW_OFFSET
  220. TRANSMIT_WINDOW_SIZE
  221. TX_EN_EXT_DELAY
  222. TXRX_HOP
  223. TX_RX_ON_DELAY
  224. TX_RX_SYNTH_DELAY
  225. US_CAPT_PREV
  226. US_CAPT_STATUS
  227. US_COUNTER
  228. US_OFFSET
  229. US_OFFSET_STATUS
  230. WAKEUP_CONFIG
  231. WAKEUP_CONFIG_EXTD
  232. WAKEUP_CONTROL
  233. WHITELIST_BASE_ADDR
  234. WINDOW_WIDEN_INTVL
  235. WINDOW_WIDEN_WINOFF
  236. WIN_MIN_STEP_SIZE
  237. WL_ADDR_TYPE
  238. WL_CONNECTION_STATUS
  239. WL_ENABLE