Browse Registers In Our Database

Browse below to find the registers you are looking for, or search for one. For each register you can visualize its contents, and for many there is some basic reference information.

Registers in Espressif Systems /ESP32-S3 /ASSIST_DEBUG

  1. CORE_0_AREA_DRAM0_0_MAX
  2. CORE_0_AREA_DRAM0_0_MAX
  3. CORE_0_AREA_DRAM0_0_MIN
  4. CORE_0_AREA_DRAM0_0_MIN
  5. CORE_0_AREA_DRAM0_1_MAX
  6. CORE_0_AREA_DRAM0_1_MAX
  7. CORE_0_AREA_DRAM0_1_MIN
  8. CORE_0_AREA_DRAM0_1_MIN
  9. CORE_0_AREA_PC
  10. CORE_0_AREA_PC
  11. CORE_0_AREA_PIF_0_MAX
  12. CORE_0_AREA_PIF_0_MAX
  13. CORE_0_AREA_PIF_0_MIN
  14. CORE_0_AREA_PIF_0_MIN
  15. CORE_0_AREA_PIF_1_MAX
  16. CORE_0_AREA_PIF_1_MAX
  17. CORE_0_AREA_PIF_1_MIN
  18. CORE_0_AREA_PIF_1_MIN
  19. CORE_0_AREA_SP
  20. CORE_0_AREA_SP
  21. CORE_0_DRAM0_EXCEPTION_MONITOR_0
  22. CORE_0_DRAM0_EXCEPTION_MONITOR_0
  23. CORE_0_DRAM0_EXCEPTION_MONITOR_1
  24. CORE_0_DRAM0_EXCEPTION_MONITOR_1
  25. CORE_0_DRAM0_EXCEPTION_MONITOR_2
  26. CORE_0_DRAM0_EXCEPTION_MONITOR_2
  27. CORE_0_DRAM0_EXCEPTION_MONITOR_3
  28. CORE_0_DRAM0_EXCEPTION_MONITOR_3
  29. CORE_0_DRAM0_EXCEPTION_MONITOR_4
  30. CORE_0_DRAM0_EXCEPTION_MONITOR_4
  31. CORE_0_DRAM0_EXCEPTION_MONITOR_5
  32. CORE_0_DRAM0_EXCEPTION_MONITOR_5
  33. CORE_0_INTR_CLR
  34. CORE_0_INTR_CLR
  35. CORE_0_INTR_ENA
  36. CORE_0_INTR_ENA
  37. CORE_0_INTR_RAW
  38. CORE_0_INTR_RAW
  39. CORE_0_IRAM0_EXCEPTION_MONITOR_0
  40. CORE_0_IRAM0_EXCEPTION_MONITOR_0
  41. CORE_0_IRAM0_EXCEPTION_MONITOR_1
  42. CORE_0_IRAM0_EXCEPTION_MONITOR_1
  43. CORE_0_MONTR_ENA
  44. CORE_0_MONTR_ENA
  45. CORE_0_RCD_PDEBUGDATA
  46. CORE_0_RCD_PDEBUGDATA
  47. CORE_0_RCD_PDEBUGENABLE
  48. CORE_0_RCD_PDEBUGENABLE
  49. CORE_0_RCD_PDEBUGINST
  50. CORE_0_RCD_PDEBUGINST
  51. CORE_0_RCD_PDEBUGLS0ADDR
  52. CORE_0_RCD_PDEBUGLS0ADDR
  53. CORE_0_RCD_PDEBUGLS0DATA
  54. CORE_0_RCD_PDEBUGLS0DATA
  55. CORE_0_RCD_PDEBUGLS0STAT
  56. CORE_0_RCD_PDEBUGLS0STAT
  57. CORE_0_RCD_PDEBUGPC
  58. CORE_0_RCD_PDEBUGPC
  59. CORE_0_RCD_PDEBUGSTATUS
  60. CORE_0_RCD_PDEBUGSTATUS
  61. CORE_0_RCD_RECORDING
  62. CORE_0_RCD_RECORDING
  63. CORE_0_RCD_SP
  64. CORE_0_RCD_SP
  65. CORE_0_SP_MAX
  66. CORE_0_SP_MAX
  67. CORE_0_SP_MIN
  68. CORE_0_SP_MIN
  69. CORE_0_SP_PC
  70. CORE_0_SP_PC
  71. CORE_0_SP_UNSTABLE
  72. CORE_0_SP_UNSTABLE
  73. CORE_1_AREA_DRAM0_0_MAX
  74. CORE_1_AREA_DRAM0_0_MAX
  75. CORE_1_AREA_DRAM0_0_MIN
  76. CORE_1_AREA_DRAM0_0_MIN
  77. CORE_1_AREA_DRAM0_1_MAX
  78. CORE_1_AREA_DRAM0_1_MAX
  79. CORE_1_AREA_DRAM0_1_MIN
  80. CORE_1_AREA_DRAM0_1_MIN
  81. CORE_1_AREA_PC
  82. CORE_1_AREA_PC
  83. CORE_1_AREA_PIF_0_MAX
  84. CORE_1_AREA_PIF_0_MAX
  85. CORE_1_AREA_PIF_0_MIN
  86. CORE_1_AREA_PIF_0_MIN
  87. CORE_1_AREA_PIF_1_MAX
  88. CORE_1_AREA_PIF_1_MAX
  89. CORE_1_AREA_PIF_1_MIN
  90. CORE_1_AREA_PIF_1_MIN
  91. CORE_1_AREA_SP
  92. CORE_1_AREA_SP
  93. CORE_1_DRAM0_EXCEPTION_MONITOR_0
  94. CORE_1_DRAM0_EXCEPTION_MONITOR_0
  95. CORE_1_DRAM0_EXCEPTION_MONITOR_1
  96. CORE_1_DRAM0_EXCEPTION_MONITOR_1
  97. CORE_1_DRAM0_EXCEPTION_MONITOR_2
  98. CORE_1_DRAM0_EXCEPTION_MONITOR_2
  99. CORE_1_DRAM0_EXCEPTION_MONITOR_3
  100. CORE_1_DRAM0_EXCEPTION_MONITOR_3
  101. CORE_1_DRAM0_EXCEPTION_MONITOR_4
  102. CORE_1_DRAM0_EXCEPTION_MONITOR_4
  103. CORE_1_DRAM0_EXCEPTION_MONITOR_5
  104. CORE_1_DRAM0_EXCEPTION_MONITOR_5
  105. CORE_1_INTR_CLR
  106. CORE_1_INTR_CLR
  107. CORE_1_INTR_ENA
  108. CORE_1_INTR_ENA
  109. CORE_1_INTR_RAW
  110. CORE_1_INTR_RAW
  111. CORE_1_IRAM0_EXCEPTION_MONITOR_0
  112. CORE_1_IRAM0_EXCEPTION_MONITOR_0
  113. CORE_1_IRAM0_EXCEPTION_MONITOR_1
  114. CORE_1_IRAM0_EXCEPTION_MONITOR_1
  115. CORE_1_MONTR_ENA
  116. CORE_1_MONTR_ENA
  117. CORE_1_RCD_PDEBUGDATA
  118. CORE_1_RCD_PDEBUGDATA
  119. CORE_1_RCD_PDEBUGENABLE
  120. CORE_1_RCD_PDEBUGENABLE
  121. CORE_1_RCD_PDEBUGINST
  122. CORE_1_RCD_PDEBUGINST
  123. CORE_1_RCD_PDEBUGLS0ADDR
  124. CORE_1_RCD_PDEBUGLS0ADDR
  125. CORE_1_RCD_PDEBUGLS0DATA
  126. CORE_1_RCD_PDEBUGLS0DATA
  127. CORE_1_RCD_PDEBUGLS0STAT
  128. CORE_1_RCD_PDEBUGLS0STAT
  129. CORE_1_RCD_PDEBUGPC
  130. CORE_1_RCD_PDEBUGPC
  131. CORE_1_RCD_PDEBUGSTATUS
  132. CORE_1_RCD_PDEBUGSTATUS
  133. CORE_1_RCD_RECORDING
  134. CORE_1_RCD_RECORDING
  135. CORE_1_RCD_SP
  136. CORE_1_RCD_SP
  137. CORE_1_SP_MAX
  138. CORE_1_SP_MAX
  139. CORE_1_SP_MIN
  140. CORE_1_SP_MIN
  141. CORE_1_SP_PC
  142. CORE_1_SP_PC
  143. CORE_1_SP_UNSTABLE
  144. CORE_1_SP_UNSTABLE
  145. CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_0
  146. CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_0
  147. CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_1
  148. CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_1
  149. DATE
  150. DATE
  151. LOG_DATA_0
  152. LOG_DATA_0
  153. LOG_DATA_1
  154. LOG_DATA_1
  155. LOG_DATA_2
  156. LOG_DATA_2
  157. LOG_DATA_3
  158. LOG_DATA_3
  159. LOG_DATA_MASK
  160. LOG_DATA_MASK
  161. LOG_MAX
  162. LOG_MAX
  163. LOG_MEM_END
  164. LOG_MEM_END
  165. LOG_MEM_FULL_FLAG
  166. LOG_MEM_FULL_FLAG
  167. LOG_MEM_START
  168. LOG_MEM_START
  169. LOG_MEM_WRITING_ADDR
  170. LOG_MEM_WRITING_ADDR
  171. LOG_MIN
  172. LOG_MIN
  173. LOG_SETTING
  174. LOG_SETTING