SPI_IER

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Interpret as SPI_IER

tf_emp_int_en=disable, rf_emp_int_en=disable, tf_full_int_en=disable, tc_int_en=disable, rf_udr_int_en=disable, rf_full_int_en=disable, rf_rdy_int_en=disable, ss_int_en=disable, rf_ovf_int_en=disable, tf_ovf_int_en=disable, tf_udr_int_en=disable, tf_erq_int_en=disable

Description

SPI Interrupt Control Register

Fields

rf_rdy_int_en	RXFIFO Ready Request Interrupt Enable 0 (disable): undefined 1 (enable): undefined
rf_emp_int_en	RXFIFO Empty Interrupt Enable 0 (disable): undefined 1 (enable): undefined
rf_full_int_en	RXFIFO Full Interrupt Enable 0 (disable): undefined 1 (enable): undefined
tf_erq_int_en	TXFIFO Empty Request Interrupt Enable 0 (disable): undefined 1 (enable): undefined
tf_emp_int_en	TXFIFO Empty Interrupt Enable 0 (disable): undefined 1 (enable): undefined
tf_full_int_en	TXFIFO Full Interrupt Enable 0 (disable): undefined 1 (enable): undefined
rf_ovf_int_en	RXFIFO Overflow Interrupt Enable 0 (disable): undefined 1 (enable): undefined
rf_udr_int_en	RXFIFO Underrun Interrupt Enable 0 (disable): undefined 1 (enable): undefined
tf_ovf_int_en	TXFIFO Overflow Interrupt Enable 0 (disable): undefined 1 (enable): undefined
tf_udr_int_en	TXFIFO Underrun Interrupt Enable 0 (disable): undefined 1 (enable): undefined
tc_int_en	Transfer Completed Interrupt Enable 0 (disable): undefined 1 (enable): undefined
ss_int_en	SSI Interrupt Enable 0 (disable): undefined 1 (enable): undefined

Links

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