Atmel /AT91SAM9CN11 /DDRSDRC /TPR2

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as TPR2

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0TXARD0TXARDS0TRPA0TRTP0TFAW

Description

DDRSDRC Timing Parameter 2 Register

Fields

TXARD

Exit Active Power Down Delay to Read Command in Mode “Fast Exit”.

TXARDS

Exit Active Power Down Delay to Read Command in Mode “Slow Exit”.

TRPA

Row Precharge All Delay

TRTP

Read to Precharge

TFAW

Four Active window

Links

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