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Atmel /AT91SAM9G10 /USART0 /IDR

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Interpret as IDR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (RXRDY)RXRDY 0 (TXRDY)TXRDY 0 (RXBRK)RXBRK 0 (ENDRX)ENDRX 0 (ENDTX)ENDTX 0 (OVRE)OVRE 0 (FRAME)FRAME 0 (PARE)PARE 0 (TIMEOUT)TIMEOUT 0 (TXEMPTY)TXEMPTY 0 (ITER)ITER 0 (TXBUFE)TXBUFE 0 (RXBUFF)RXBUFF 0 (NACK)NACK 0 (CTSIC)CTSIC

Description

Interrupt Disable Register

Fields

RXRDY

RXRDY Interrupt Disable
TXRDY

TXRDY Interrupt Disable
RXBRK

Receiver Break Interrupt Disable
ENDRX

End of Receive Transfer Interrupt Disable (available in all USART modes of operation)
ENDTX

End of Transmit Interrupt Disable (available in all USART modes of operation)
OVRE

Overrun Error Interrupt Enable
FRAME

Framing Error Interrupt Disable
PARE

Parity Error Interrupt Disable
TIMEOUT

Time-out Interrupt Disable
TXEMPTY

TXEMPTY Interrupt Disable
ITER

Max Number of Repetitions Reached Interrupt Disable
TXBUFE

Buffer Empty Interrupt Disable (available in all USART modes of operation)
RXBUFF

Buffer Full Interrupt Disable (available in all USART modes of operation)
NACK

Non AcknowledgeInterrupt Disable
CTSIC

Clear to Send Input Change Interrupt Disable

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data