Atmel /AT91SAM9G15 /LCDC /HEOIER

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as HEOIER

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DMA)DMA 0 (DSCR)DSCR 0 (ADD)ADD 0 (DONE)DONE 0 (OVR)OVR 0 (UDMA)UDMA 0 (UDSCR)UDSCR 0 (UADD)UADD 0 (UDONE)UDONE 0 (UOVR)UOVR 0 (VDMA)VDMA 0 (VDSCR)VDSCR 0 (VADD)VADD 0 (VDONE)VDONE 0 (VOVR)VOVR

Description

High End Overlay Interrupt Enable Register

Fields

DMA

End of DMA Transfer Interrupt Enable Register

DSCR

Descriptor Loaded Interrupt Enable Register

ADD

Head Descriptor Loaded Interrupt Enable Register

DONE

End of List Interrupt Enable Register

OVR

Overflow Interrupt Enable Register

UDMA

End of DMA Transfer for U or UV Chrominance Interrupt Enable Register

UDSCR

Descriptor Loaded for U or UV Chrominance Interrupt Enable Register

UADD

Head Descriptor Loaded for U or UV Chrominance Interrupt Enable Register

UDONE

End of List for U or UV Chrominance Interrupt Enable Register

UOVR

Overflow for U or UV Chrominance Interrupt Enable Register

VDMA

End of DMA for V Chrominance Transfer Interrupt Enable Register

VDSCR

Descriptor Loaded for V Chrominance Interrupt Enable Register

VADD

Head Descriptor Loaded for V Chrominance Interrupt Enable Register

VDONE

End of List for V Chrominance Interrupt Enable Register

VOVR

Overflow for V Chrominance Interrupt Enable Register

Links

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