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Atmel /AT91SAM9G15 /LCDC /LCDDIS

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Interpret as LCDDIS

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CLKDIS)CLKDIS 0 (SYNCDIS)SYNCDIS 0 (DISPDIS)DISPDIS 0 (PWMDIS)PWMDIS 0 (CLKRST)CLKRST 0 (SYNCRST)SYNCRST 0 (DISPRST)DISPRST 0 (PWMRST)PWMRST

Description

LCD Controller Disable Register

Fields

CLKDIS

LCD Controller Pixel Clock Disable
SYNCDIS

LCD Controller Horizontal and Vertical Synchronization Disable
DISPDIS

LCD Controller DISP Signal Disable
PWMDIS

LCD Controller Pulse Width Modulation Disable
CLKRST

LCD Controller Clock Reset
SYNCRST

LCD Controller Horizontal and Vertical Synchronization Reset
DISPRST

LCD Controller DISP Signal Reset
PWMRST

LCD Controller PWM Reset

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data