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Atmel /AT91SAM9G20 /RTT /MR

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Interpret as MR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RTPRES0 (ALMIEN)ALMIEN 0 (RTTINCIEN)RTTINCIEN 0 (RTTRST)RTTRST

Description

Mode Register

Fields

RTPRES

Real-time Timer Prescaler Value
ALMIEN

Alarm Interrupt Enable
RTTINCIEN

Real-time Timer Increment Interrupt Enable
RTTRST

Real-time Timer Restart

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data