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Atmel /AT91SAM9M10 /DDRSDRC1 /HS

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Interpret as HS

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https://regviz.com/r/Atmel/AT91SAM9G25/DDRSDRC/HS#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DIS_ANTICIP_READ)DIS_ANTICIP_READ

Description

DDRSDRC High Speed Register

Fields

DIS_ANTICIP_READ

Anticip Read Access

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data