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Atmel /AT91SAM9M10 /DMAC /CFG0

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Interpret as CFG0

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SRC_PER0DST_PER0 (SRC_REP)SRC_REP 0 (SRC_H2SEL)SRC_H2SEL 0 (DST_REP)DST_REP 0 (DST_H2SEL)DST_H2SEL 0 (SOD)SOD 0 (LOCK_IF)LOCK_IF 0 (LOCK_B)LOCK_B 0 (LOCK_IF_L)LOCK_IF_L 0AHB_PROT 0 (ALAP_CFG)FIFOCFG

FIFOCFG=ALAP_CFG

Description

DMAC Channel Configuration Register (ch_num = 0)

Fields

SRC_PER
DST_PER
SRC_REP
SRC_H2SEL
DST_REP
DST_H2SEL
SOD
LOCK_IF
LOCK_B
LOCK_IF_L
AHB_PROT
FIFOCFG

0 (ALAP_CFG): The largest defined length AHB burst is performed on the destination AHB interface.

1 (HALF_CFG): When half FIFO size is available/filled, a source/destination request is serviced.

2 (ASAP_CFG): When there is enough space/data available to perform a single AHB access, then the request is serviced.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data