Atmel /AT91SAM9X25 /DMAC1 /CFG6

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Interpret as CFG6

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SRC_PER0DST_PER0 (CONTIGUOUS_ADDR)SRC_REP 0 (SW)SRC_H2SEL 0 (CONTIGUOUS_ADDR)DST_REP 0 (SW)DST_H2SEL 0 (DISABLE)SOD 0 (DISABLE)LOCK_IF 0 (DISABLE)LOCK_B 0 (CHUNK)LOCK_IF_L 0AHB_PROT 0 (ALAP_CFG)FIFOCFG

LOCK_IF=DISABLE, SOD=DISABLE, DST_H2SEL=SW, LOCK_IF_L=CHUNK, DST_REP=CONTIGUOUS_ADDR, LOCK_B=DISABLE, SRC_H2SEL=SW, SRC_REP=CONTIGUOUS_ADDR, FIFOCFG=ALAP_CFG

Description

DMAC Channel Configuration Register (ch_num = 6)

Fields

SRC_PER

Source with Peripheral identifier

DST_PER

Destination with Peripheral identifier

SRC_REP

Source Reloaded from Previous

0 (CONTIGUOUS_ADDR): When automatic mode is activated, source address is contiguous between two buffers.

1 (RELOAD_ADDR): When automatic mode is activated, the source address and the control register are reloaded from previous transfer.

SRC_H2SEL

Software or Hardware Selection for the Source

0 (SW): Software handshaking interface is used to trigger a transfer request.

1 (HW): Hardware handshaking interface is used to trigger a transfer request.

DST_REP

Destination Reloaded from Previous

0 (CONTIGUOUS_ADDR): When automatic mode is activated, destination address is contiguous between two buffers.

1 (RELOAD_ADDR): When automatic mode is activated, the destination and the control register are reloaded from the pre-vious transfer.

DST_H2SEL

Software or Hardware Selection for the Destination

0 (SW): Software handshaking interface is used to trigger a transfer request.

1 (HW): Hardware handshaking interface is used to trigger a transfer request.

SOD

Stop On Done

0 (DISABLE): STOP ON DONE disabled, the descriptor fetch operation ignores DONE Field of CTRLA register.

1 (ENABLE): STOP ON DONE activated, the DMAC module is automatically disabled if DONE FIELD is set to 1.

LOCK_IF

Interface Lock

0 (DISABLE): Interface Lock capability is disabled

1 (ENABLE): Interface Lock capability is enabled

LOCK_B

Bus Lock

0 (DISABLE): AHB Bus Locking capability is disabled.

LOCK_IF_L

Master Interface Arbiter Lock

0 (CHUNK): The Master Interface Arbiter is locked by the channel x for a chunk transfer.

1 (BUFFER): The Master Interface Arbiter is locked by the channel x for a buffer transfer.

AHB_PROT

AHB Protection

FIFOCFG

FIFO Configuration

0 (ALAP_CFG): The largest defined length AHB burst is performed on the destination AHB interface.

1 (HALF_CFG): When half FIFO size is available/filled, a source/destination request is serviced.

2 (ASAP_CFG): When there is enough space/data available to perform a single AHB access, then the request is serviced.

Links

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