Atmel /ATSAM3A4C /UOTGHS /DEVEPTIDR0_ISOENPT

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Interpret as DEVEPTIDR0_ISOENPT

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TXINEC)TXINEC 0 (RXOUTEC)RXOUTEC 0 (UNDERFEC)UNDERFEC 0 (HBISOINERREC)HBISOINERREC 0 (HBISOFLUSHEC)HBISOFLUSHEC 0 (OVERFEC)OVERFEC 0 (CRCERREC)CRCERREC 0 (SHORTPACKETEC)SHORTPACKETEC 0 (MDATEC)MDATEC 0 (DATAXEC)DATAXEC 0 (ERRORTRANSEC)ERRORTRANSEC 0 (NBUSYBKEC)NBUSYBKEC 0 (FIFOCONC)FIFOCONC 0 (EPDISHDMAC)EPDISHDMAC

Description

Device Endpoint Disable Register (n = 0)

Fields

TXINEC

Transmitted IN Interrupt Clear

RXOUTEC

Received OUT Data Interrupt Clear

UNDERFEC

Underflow Interrupt Clear

HBISOINERREC

High Bandwidth Isochronous IN Error Interrupt Clear

HBISOFLUSHEC

High Bandwidth Isochronous IN Flush Interrupt Clear

OVERFEC

Overflow Interrupt Clear

CRCERREC

CRC Error Interrupt Clear

SHORTPACKETEC

Shortpacket Interrupt Clear

MDATEC

MData Interrupt Clear

DATAXEC

DataX Interrupt Clear

ERRORTRANSEC

Transaction Error Interrupt Clear

NBUSYBKEC

Number of Busy Banks Interrupt Clear

FIFOCONC

FIFO Control Clear

EPDISHDMAC

Endpoint Interrupts Disable HDMA Request Clear

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