Regviz

Atmel /ATSAM3A8C /PWM /OSS

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Interpret as OSS

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https://regviz.com/r/Atmel/ATSAM3A8C/PWM/OSS#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (OSSH0)OSSH0 0 (OSSH1)OSSH1 0 (OSSH2)OSSH2 0 (OSSH3)OSSH3 0 (OSSH4)OSSH4 0 (OSSH5)OSSH5 0 (OSSH6)OSSH6 0 (OSSH7)OSSH7 0 (OSSL0)OSSL0 0 (OSSL1)OSSL1 0 (OSSL2)OSSL2 0 (OSSL3)OSSL3 0 (OSSL4)OSSL4 0 (OSSL5)OSSL5 0 (OSSL6)OSSL6 0 (OSSL7)OSSL7

Description

PWM Output Selection Set Register

Fields

OSSH0

Output Selection Set for PWMH output of the channel 0
OSSH1

Output Selection Set for PWMH output of the channel 1
OSSH2

Output Selection Set for PWMH output of the channel 2
OSSH3

Output Selection Set for PWMH output of the channel 3
OSSH4

Output Selection Set for PWMH output of the channel 4
OSSH5

Output Selection Set for PWMH output of the channel 5
OSSH6

Output Selection Set for PWMH output of the channel 6
OSSH7

Output Selection Set for PWMH output of the channel 7
OSSL0

Output Selection Set for PWML output of the channel 0
OSSL1

Output Selection Set for PWML output of the channel 1
OSSL2

Output Selection Set for PWML output of the channel 2
OSSL3

Output Selection Set for PWML output of the channel 3
OSSL4

Output Selection Set for PWML output of the channel 4
OSSL5

Output Selection Set for PWML output of the channel 5
OSSL6

Output Selection Set for PWML output of the channel 6
OSSL7

Output Selection Set for PWML output of the channel 7

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data