Atmel /ATSAM3N2C /DACC /MR

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Interpret as MR

TRGSEL=TRGSEL0

Mode Register

TRGEN	Trigger Enable
TRGSEL	Trigger Selection 0 (TRGSEL0): External trigger 1 (TRGSEL1): TIO Output of the Timer Counter Channel 0 2 (TRGSEL2): TIO Output of the Timer Counter Channel 1 3 (TRGSEL3): TIO Output of the Timer Counter Channel 2
DACEN	DAC enable
WORD	Word Transfer
STARTUP	Startup Time Selection
CLKDIV	DAC Clock Divider for Internal Trigger

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