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Atmel /ATSAM3S8C /TC0 /QIDR

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Interpret as QIDR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (IDX)IDX 0 (DIRCHG)DIRCHG 0 (QERR)QERR

Description

QDEC Interrupt Disable Register

Fields

IDX

InDeX
DIRCHG

DIRection CHanGe
QERR

Quadrature ERRor

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data