TRGSEL=ADC_TRIG0, TRGEN=DIS, FREERUN=OFF, STARTUP=SUT0, ANACH=NONE, SETTLING=AST3, USEQ=NUM_ORDER, FWUP=OFF, SLEEP=NORMAL, LOWRES=BITS_12
Mode Register
| TRGEN | Trigger Enable 0 (DIS): Hardware triggers are disabled. Starting a conversion is only possible by software. 1 (EN): Hardware trigger selected by TRGSEL field is enabled. |
| TRGSEL | Trigger Selection 0 (ADC_TRIG0): External trigger 1 (ADC_TRIG1): TIO Output of the Timer Counter Channel 0 2 (ADC_TRIG2): TIO Output of the Timer Counter Channel 1 3 (ADC_TRIG3): TIO Output of the Timer Counter Channel 2 4 (ADC_TRIG4): PWM Event Line 0 5 (ADC_TRIG5): PWM Event Line 1 |
| LOWRES | Resolution 0 (BITS_12): 12-bit resolution 1 (BITS_10): 10-bit resolution |
| SLEEP | Sleep Mode 0 (NORMAL): Normal Mode: The ADC Core and reference voltage circuitry are kept ON between conversions 1 (SLEEP): Sleep Mode: The ADC Core and reference voltage circuitry are OFF between conversions |
| FWUP | Fast Wake Up 0 (OFF): Normal Sleep Mode: The sleep mode is defined by the SLEEP bit 1 (ON): Fast Wake Up Sleep Mode: The Voltage reference is ON between conversions and ADC Core is OFF |
| FREERUN | Free Run Mode 0 (OFF): Normal Mode 1 (ON): Free Run Mode: Never wait for any trigger. |
| PRESCAL | Prescaler Rate Selection |
| STARTUP | Start Up Time 0 (SUT0): 0 periods of ADCClock 1 (SUT8): 8 periods of ADCClock 2 (SUT16): 16 periods of ADCClock 3 (SUT24): 24 periods of ADCClock 4 (SUT64): 64 periods of ADCClock 5 (SUT80): 80 periods of ADCClock 6 (SUT96): 96 periods of ADCClock 7 (SUT112): 112 periods of ADCClock 8 (SUT512): 512 periods of ADCClock 9 (SUT576): 576 periods of ADCClock 10 (SUT640): 640 periods of ADCClock 11 (SUT704): 704 periods of ADCClock 12 (SUT768): 768 periods of ADCClock 13 (SUT832): 832 periods of ADCClock 14 (SUT896): 896 periods of ADCClock 15 (SUT960): 960 periods of ADCClock |
| SETTLING | Analog Settling Time 0 (AST3): 3 periods of ADCClock 1 (AST5): 5 periods of ADCClock 2 (AST9): 9 periods of ADCClock 3 (AST17): 17 periods of ADCClock |
| ANACH | Analog Change 0 (NONE): No analog change on channel switching: DIFF0, GAIN0 and OFF0 are used for all channels 1 (ALLOWED): Allows different analog settings for each channel. See ADC_CGR and ADC_COR Registers |
| TRACKTIM | Tracking Time |
| TRANSFER | Transfer Period |
| USEQ | Use Sequence Enable 0 (NUM_ORDER): Normal Mode: The controller converts channels in a simple numeric order. 1 (REG_ORDER): User Sequence Mode: The sequence respects what is defined in ADC_SEQR1 and ADC_SEQR2 registers. |