Atmel /ATSAM3X4C /UOTGHS /DEVIMR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as DEVIMR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SUSPE)SUSPE 0 (MSOFE)MSOFE 0 (SOFE)SOFE 0 (EORSTE)EORSTE 0 (WAKEUPE)WAKEUPE 0 (EORSME)EORSME 0 (UPRSME)UPRSME 0 (PEP_0)PEP_0 0 (PEP_1)PEP_1 0 (PEP_2)PEP_2 0 (PEP_3)PEP_3 0 (PEP_4)PEP_4 0 (PEP_5)PEP_5 0 (PEP_6)PEP_6 0 (PEP_7)PEP_7 0 (PEP_8)PEP_8 0 (PEP_9)PEP_9 0 (DMA_1)DMA_1 0 (DMA_2)DMA_2 0 (DMA_3)DMA_3 0 (DMA_4)DMA_4 0 (DMA_5)DMA_5 0 (DMA_6)DMA_6

Description

Device Global Interrupt Mask Register

Fields

SUSPE

Suspend Interrupt Mask

MSOFE

Micro Start of Frame Interrupt Mask

SOFE

Start of Frame Interrupt Mask

EORSTE

End of Reset Interrupt Mask

WAKEUPE

Wake-Up Interrupt Mask

EORSME

End of Resume Interrupt Mask

UPRSME

Upstream Resume Interrupt Mask

PEP_0

Endpoint 0 Interrupt Mask

PEP_1

Endpoint 1 Interrupt Mask

PEP_2

Endpoint 2 Interrupt Mask

PEP_3

Endpoint 3 Interrupt Mask

PEP_4

Endpoint 4 Interrupt Mask

PEP_5

Endpoint 5 Interrupt Mask

PEP_6

Endpoint 6 Interrupt Mask

PEP_7

Endpoint 7 Interrupt Mask

PEP_8

Endpoint 8 Interrupt Mask

PEP_9

Endpoint 9 Interrupt Mask

DMA_1

DMA Channel 1 Interrupt Mask

DMA_2

DMA Channel 2 Interrupt Mask

DMA_3

DMA Channel 3 Interrupt Mask

DMA_4

DMA Channel 4 Interrupt Mask

DMA_5

DMA Channel 5 Interrupt Mask

DMA_6

DMA Channel 6 Interrupt Mask

Links

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