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Atmel /ATSAM3X8C /CAN0 /BR

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Interpret as BR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0PHASE2 0PHASE1 0PROPAG 0SJW0BRP0 (ONCE)SMP

SMP=ONCE

Description

Baudrate Register

Fields

PHASE2

Phase 2 segment
PHASE1

Phase 1 segment
PROPAG

Programming time segment
SJW

Re-synchronization jump width
BRP

Baudrate Prescaler.
SMP

Sampling Mode

0 (ONCE): The incoming bit stream is sampled once at sample point.

1 (THREE): The incoming bit stream is sampled three times with a period of a MCK clock period, centered on sample point.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data