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Atmel /ATSAM4S4B /DACC /IDR

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Interpret as IDR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TXRDY)TXRDY 0 (EOC)EOC 0 (ENDTX)ENDTX 0 (TXBUFE)TXBUFE

Description

Interrupt Disable Register

Fields

TXRDY

Transmit Ready Interrupt Disable.
EOC

End of Conversion Interrupt Disable
ENDTX

End of Transmit Buffer Interrupt Disable
TXBUFE

Transmit Buffer Empty Interrupt Disable

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data