CPRE=MCK
PWM Channel Mode Register (ch_num = 2)
| CPRE | Channel Pre-scaler 0 (MCK): Peripheral clock 1 (MCK_DIV_2): Peripheral clock/2 2 (MCK_DIV_4): Peripheral clock/4 3 (MCK_DIV_8): Peripheral clock/8 4 (MCK_DIV_16): Peripheral clock/16 5 (MCK_DIV_32): Peripheral clock/32 6 (MCK_DIV_64): Peripheral clock/64 7 (MCK_DIV_128): Peripheral clock/128 8 (MCK_DIV_256): Peripheral clock/256 9 (MCK_DIV_512): Peripheral clock/512 10 (MCK_DIV_1024): Peripheral clock/1024 11 (CLKA): Clock A 12 (CLKB): Clock B |
| CALG | Channel Alignment |
| CPOL | Channel Polarity |
| CES | Counter Event Selection |
| DTE | Dead-Time Generator Enable |
| DTHI | Dead-Time PWMHx Output Inverted |
| DTLI | Dead-Time PWMLx Output Inverted |