Atmel /ATSAM4S4B /PWM /IDR2

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Interpret as IDR2

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (WRDY)WRDY 0 (ENDTX)ENDTX 0 (TXBUFE)TXBUFE 0 (UNRE)UNRE 0 (CMPM0)CMPM0 0 (CMPM1)CMPM1 0 (CMPM2)CMPM2 0 (CMPM3)CMPM3 0 (CMPM4)CMPM4 0 (CMPM5)CMPM5 0 (CMPM6)CMPM6 0 (CMPM7)CMPM7 0 (CMPU0)CMPU0 0 (CMPU1)CMPU1 0 (CMPU2)CMPU2 0 (CMPU3)CMPU3 0 (CMPU4)CMPU4 0 (CMPU5)CMPU5 0 (CMPU6)CMPU6 0 (CMPU7)CMPU7

Description

PWM Interrupt Disable Register 2

Fields

WRDY

Write Ready for Synchronous Channels Update Interrupt Disable

ENDTX

PDC End of TX Buffer Interrupt Disable

TXBUFE

PDC TX Buffer Empty Interrupt Disable

UNRE

Synchronous Channels Update Underrun Error Interrupt Disable

CMPM0

Comparison 0 Match Interrupt Disable

CMPM1

Comparison 1 Match Interrupt Disable

CMPM2

Comparison 2 Match Interrupt Disable

CMPM3

Comparison 3 Match Interrupt Disable

CMPM4

Comparison 4 Match Interrupt Disable

CMPM5

Comparison 5 Match Interrupt Disable

CMPM6

Comparison 6 Match Interrupt Disable

CMPM7

Comparison 7 Match Interrupt Disable

CMPU0

Comparison 0 Update Interrupt Disable

CMPU1

Comparison 1 Update Interrupt Disable

CMPU2

Comparison 2 Update Interrupt Disable

CMPU3

Comparison 3 Update Interrupt Disable

CMPU4

Comparison 4 Update Interrupt Disable

CMPU5

Comparison 5 Update Interrupt Disable

CMPU6

Comparison 6 Update Interrupt Disable

CMPU7

Comparison 7 Update Interrupt Disable

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