Atmel /ATSAM4S4B /SUPC /WUMR

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Interpret as WUMR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (NOT_ENABLE)SMEN 0 (NOT_ENABLE)RTTEN 0 (NOT_ENABLE)RTCEN 0 (NOT_ENABLE)LPDBCEN0 0 (NOT_ENABLE)LPDBCEN1 0 (NOT_ENABLE)LPDBCCLR 0 (IMMEDIATE)WKUPDBC 0 (DISABLE)LPDBC

LPDBCCLR=NOT_ENABLE, LPDBCEN0=NOT_ENABLE, SMEN=NOT_ENABLE, RTCEN=NOT_ENABLE, LPDBC=DISABLE, RTTEN=NOT_ENABLE, WKUPDBC=IMMEDIATE, LPDBCEN1=NOT_ENABLE

Description

Supply Controller Wake-up Mode Register

Fields

SMEN

Supply Monitor Wake-up Enable

0 (NOT_ENABLE): The supply monitor detection has no wake-up effect.

1 (ENABLE): The supply monitor detection forces the wake-up of the core power supply.

RTTEN

Real-time Timer Wake-up Enable

0 (NOT_ENABLE): The RTT alarm signal has no wake-up effect.

1 (ENABLE): The RTT alarm signal forces the wake-up of the core power supply.

RTCEN

Real-time Clock Wake-up Enable

0 (NOT_ENABLE): The RTC alarm signal has no wake-up effect.

1 (ENABLE): The RTC alarm signal forces the wake-up of the core power supply.

LPDBCEN0

Low-power Debouncer Enable WKUP0

0 (NOT_ENABLE): The WKUP0 input pin is not connected to the low-power debouncer.

1 (ENABLE): The WKUP0 input pin is connected to the low-power debouncer and forces a system wake-up.

LPDBCEN1

Low-power Debouncer Enable WKUP1

0 (NOT_ENABLE): The WKUP1 input pin is not connected to the low-power debouncer.

1 (ENABLE): The WKUP1 input pin is connected to the low-power debouncer and forces a system wake-up.

LPDBCCLR

Low-power Debouncer Clear

0 (NOT_ENABLE): A low-power debounce event does not create an immediate clear on the first half of GPBR registers.

1 (ENABLE): A low-power debounce event on WKUP0 or WKUP1 generates an immediate clear on the first half of GPBR registers.

WKUPDBC

Wake-up Inputs Debouncer Period

0 (IMMEDIATE): Immediate, no debouncing, detected active at least on one Slow Clock edge.

1 (3_SCLK): WKUPx shall be in its active state for at least 3 SLCK periods

2 (32_SCLK): WKUPx shall be in its active state for at least 32 SLCK periods

3 (512_SCLK): WKUPx shall be in its active state for at least 512 SLCK periods

4 (4096_SCLK): WKUPx shall be in its active state for at least 4,096 SLCK periods

5 (32768_SCLK): WKUPx shall be in its active state for at least 32,768 SLCK periods

LPDBC

Low-power Debouncer Period

0 (DISABLE): Disable the low-power debouncers.

1 (2_RTCOUT0): WKUP0/1 in active state for at least 2 RTCOUTx clock periods

2 (3_RTCOUT0): WKUP0/1 in active state for at least 3 RTCOUTx clock periods

3 (4_RTCOUT0): WKUP0/1 in active state for at least 4 RTCOUTx clock periods

4 (5_RTCOUT0): WKUP0/1 in active state for at least 5 RTCOUTx clock periods

5 (6_RTCOUT0): WKUP0/1 in active state for at least 6 RTCOUTx clock periods

6 (7_RTCOUT0): WKUP0/1 in active state for at least 7 RTCOUTx clock periods

7 (8_RTCOUT0): WKUP0/1 in active state for at least 8 RTCOUTx clock periods

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