USCLKS=MCK
Mode Register
| USART_MODE | USART Mode of Operation 14 (SPI_MASTER): SPI master 15 (SPI_SLAVE): SPI Slave |
| USCLKS | Clock Selection 0 (MCK): Peripheral clock is selected 1 (DIV): Peripheral clock divided (DIV=8) is selected 3 (SCK): Serial Clock SLK is selected |
| CHRL | Character Length 3 (8_BIT): Character length is 8 bits |
| CPHA | SPI Clock Phase |
| CPOL | SPI Clock Polarity |
| CLKO | Clock Output Select |
| WRDBT | Wait Read Data Before Transfer |