Atmel /ATSAM4S8B /PIOA /SCDR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SCDR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0DIV

Description

Slow Clock Divider Debouncing Register

Fields

DIV

Slow Clock Divider Selection for Debouncing

Links

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