Regviz

Atmel /ATSAM4SD32C /CMCC /MCTRL

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Interpret as MCTRL

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https://regviz.com/r/Atmel/ATSAM4SA16B/CMCC/MCTRL#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SWRST)SWRST

Description

Cache Controller Monitor Control Register

Fields

SWRST

Monitor

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data