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Atmel /ATSAMA5D31 /DMAC0 /CHER

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Interpret as CHER

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https://regviz.com/r/Atmel/AT91SAM9G25/DMAC1/CHER#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ENA0)ENA0 0 (ENA1)ENA1 0 (ENA2)ENA2 0 (ENA3)ENA3 0 (ENA4)ENA4 0 (ENA5)ENA5 0 (ENA6)ENA6 0 (ENA7)ENA7 0 (SUSP0)SUSP0 0 (SUSP1)SUSP1 0 (SUSP2)SUSP2 0 (SUSP3)SUSP3 0 (SUSP4)SUSP4 0 (SUSP5)SUSP5 0 (SUSP6)SUSP6 0 (SUSP7)SUSP7 0 (KEEP0)KEEP0 0 (KEEP1)KEEP1 0 (KEEP2)KEEP2 0 (KEEP3)KEEP3 0 (KEEP4)KEEP4 0 (KEEP5)KEEP5 0 (KEEP6)KEEP6 0 (KEEP7)KEEP7

Description

DMAC Channel Handler Enable Register

Fields

ENA0

Enable [7:0]
ENA1

Enable [7:0]
ENA2

Enable [7:0]
ENA3

Enable [7:0]
ENA4

Enable [7:0]
ENA5

Enable [7:0]
ENA6

Enable [7:0]
ENA7

Enable [7:0]
SUSP0

Suspend [7:0]
SUSP1

Suspend [7:0]
SUSP2

Suspend [7:0]
SUSP3

Suspend [7:0]
SUSP4

Suspend [7:0]
SUSP5

Suspend [7:0]
SUSP6

Suspend [7:0]
SUSP7

Suspend [7:0]
KEEP0

Keep on [7:0]
KEEP1

Keep on [7:0]
KEEP2

Keep on [7:0]
KEEP3

Keep on [7:0]
KEEP4

Keep on [7:0]
KEEP5

Keep on [7:0]
KEEP6

Keep on [7:0]
KEEP7

Keep on [7:0]

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data