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Atmel /ATSAMA5D31 /PIT /MR

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Interpret as MR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0PIV0 (PITEN)PITEN 0 (PITIEN)PITIEN

Description

Mode Register

Fields

PIV

Periodic Interval Value
PITEN

Period Interval Timer Enabled
PITIEN

Periodic Interval Timer Interrupt Enable

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data