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Atmel /ATSAMA5D31 /UDPHS /DMASTATUS5

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Interpret as DMASTATUS5

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CHANN_ENB)CHANN_ENB 0 (CHANN_ACT)CHANN_ACT 0 (END_TR_ST)END_TR_ST 0 (END_BF_ST)END_BF_ST 0 (DESC_LDST)DESC_LDST 0BUFF_COUNT

Description

UDPHS DMA Channel Status Register (channel = 5)

Fields

CHANN_ENB

Channel Enable Status
CHANN_ACT

Channel Active Status
END_TR_ST

End of Channel Transfer Status
END_BF_ST

End of Channel Buffer Status
DESC_LDST

Descriptor Loaded Status
BUFF_COUNT

Buffer Byte Count

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data