LCD Controller Configuration Register 0
| CLKPOL | LCD Controller Clock Polarity |
| CLKSEL | LCD Controller Clock Source Selection |
| CLKPWMSEL | LCD Controller PWM Clock Source Selection |
| CGDISBASE | Clock Gating Disable Control for the Base Layer |
| CGDISOVR1 | Clock Gating Disable Control for the Overlay 1 Layer |
| CGDISOVR2 | Clock Gating Disable Control for the Overlay 2 Layer |
| CGDISHEO | Clock Gating Disable Control for the High End Overlay |
| CGDISHCR | Clock Gating Disable Control for the Hardware Cursor Layer |
| CGDISPP | Clock Gating Disable Control for the Post Processing Layer |
| CLKDIV | LCD Controller Clock Divider |