Regviz

Atmel /ATSAMA5D35 /MPDDRC /LPDDR2_TIM_CAL

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as LPDDR2_TIM_CAL

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Atmel/ATSAMA5D31/MPDDRC/LPDDR2_TIM_CAL#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0ZQCS

Description

MPDDRC LPDDR2 Timing Calibration Register

Fields

ZQCS

ZQ Calibration Short

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data