Atmel /ATSAMA5D35 /MPDDRC /TPR1

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as TPR1

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0TRFC0TXSNR0TXSRD0TXP

Description

MPDDRC Timing Parameter 1 Register

Fields

TRFC

Row Cycle Delay

TXSNR

Exit Self Refresh Delay to Non Read Command

TXSRD

Exit Self Refresh Delay to Read Command

TXP

Exit Power-down Delay to First Command

Links

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