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Fujitsu /MB9AFA4xN /LCDC /LCDC_BLINK

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Interpret as LCDC_BLINK

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15 1211 87 43 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (BLD00)BLD00 0 (BLD01)BLD01 0 (BLD02)BLD02 0 (BLD03)BLD03 0 (BLD04)BLD04 0 (BLD05)BLD05 0 (BLD06)BLD06 0 (BLD07)BLD07 0 (BLD08)BLD08 0 (BLD09)BLD09 0 (BLD10)BLD10 0 (BLD11)BLD11 0 (BLD12)BLD12 0 (BLD13)BLD13 0 (BLD14)BLD14 0 (BLD15)BLD15

Description

LCDC Blink Setting Register

Fields

BLD00

Blink operation control bit 0
BLD01

Blink operation control bit 1
BLD02

Blink operation control bit 2
BLD03

Blink operation control bit 3
BLD04

Blink operation control bit 4
BLD05

Blink operation control bit 5
BLD06

Blink operation control bit 6
BLD07

Blink operation control bit 7
BLD08

Blink operation control bit 8
BLD09

Blink operation control bit 9
BLD10

Blink operation control bit 10
BLD11

Blink operation control bit 11
BLD12

Blink operation control bit 12
BLD13

Blink operation control bit 13
BLD14

Blink operation control bit 14
BLD15

Blink operation control bit 15

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data