Control Register 1
| ST | Start bit |
| RUN | RTC count block operation bit |
| SRST | RTC reset bit |
| SCST | 1-second clock output stop bit |
| SCRST | Sub second generation/1-second generation counter reset bit |
| BUSY | Busy bit |
| MIEN | Alarm minute register enable bit |
| HEN | Alarm hour register enable bit |
| DEN | Alarm date register enable bit |
| MOEN | Alarm month register enable bit |
| YEN | Alarm year register enable bit |
| INTSSI | 0.5-second interrupt flag bit |
| INTSI | 1-second interrupt flag bit |
| INTMI | 1-minute interrupt flag bit |
| INTHI | 1-hour interrupt flag bit |
| INTTMI | Timer interrupt flag bit |
| INTALI | Alarm interrupt flag bit |
| INTERI | Time rewrite error interrupt flag bit |
| INTCRI | Year/month/date/hour/minute/second/day of the week counter value read completion interrupt flag bit |
| INTSSIE | 0.5-second interrupt enable bit |
| INTSIE | 1-second interrupt enable bit |
| INTMIE | 1-minute interrupt enable bit |
| INTHIE | 1-hour interrupt enable bit |
| INTTMIE | Timer interrupt enable bit |
| INTALIE | Alarm interrupt enable bit |
| INTERIE | Time rewrite error interrupt enable bit |
| INTCRIE | Year/month/date/hour/minute/second/day of the week counter value read completion interrupt enable bit |