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Fujitsu /MB9AFB4xN /GPIO /PFR0

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Interpret as PFR0

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https://regviz.com/r/Spansion/MB9AFA4xN/GPIO/PFR0#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (P0)P0 0 (P1)P1 0 (P2)P2 0 (P3)P3 0 (P4)P4 0 (P5)P5 0 (P6)P6 0 (P7)P7 0 (P8)P8 0 (P9)P9 0 (PA)PA 0 (PB)PB 0 (PC)PC 0 (PD)PD 0 (PE)PE 0 (PF)PF

Description

Port function setting register 0

Fields

P0

Bit0 of PFR0
P1

Bit1 of PFR0
P2

Bit2 of PFR0
P3

Bit3 of PFR0
P4

Bit4 of PFR0
P5

Bit5 of PFR0
P6

Bit6 of PFR0
P7

Bit7 of PFR0
P8

Bit8 of PFR0
P9

Bit9 of PFR0
PA

Bit10 of PFR0
PB

Bit11 of PFR0
PC

Bit12 of PFR0
PD

Bit13 of PFR0
PE

Bit14 of PFR0
PF

Bit15 of PFR0

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data