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Fujitsu /MB9BF40xR /MFS4 /CSIO_FCR0

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Interpret as CSIO_FCR0

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7 43 0 0 00 0 0 0 0 0 0 0 0 (FE1)FE1 0 (FE2)FE2 0 (FCL1)FCL1 0 (FCL2)FCL2 0 (FSET)FSET 0 (FLD)FLD 0 (FLST)FLST

Description

FIFO Control Register 0

Fields

FE1

FIFO1 operation enable bit
FE2

FIFO2 operation enable bit
FCL1

FIFO1 reset bit
FCL2

FIFO2 reset bit
FSET

FIFO pointer save bit
FLD

FIFO pointer reload bit
FLST

FIFO re-transmit data lost flag bit

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data