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Fujitsu /MB9BF41xR /GPIO /PFR5

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Interpret as PFR5

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https://regviz.com/r/Fujitsu/MB9BF41xS/GPIO/PFR5#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (P50)P50 0 (P51)P51 0 (P52)P52 0 (P53)P53 0 (P54)P54 0 (P55)P55 0 (P56)P56 0 (P57)P57 0 (P58)P58 0 (P59)P59 0 (P5A)P5A 0 (P5B)P5B

Description

Port function setting register 5

Fields

P50

Bit0 of PFR5
P51

Bit1 of PFR5
P52

Bit2 of PFR5
P53

Bit3 of PFR5
P54

Bit4 of PFR5
P55

Bit5 of PFR5
P56

Bit6 of PFR5
P57

Bit7 of PFR5
P58

Bit8 of PFR5
P59

Bit9 of PFR5
P5A

Bit10 of PFR5
P5B

Bit11 of PFR5

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data