Cut and paste this URL to share the unmodified register and value:
https://regviz.com/r/Spansion/MB9BF40xN/BT0/RT_STC#0x0
Status Control Register
Underflow interrupt request bit
Trigger interrupt request bit
Underflow interrupt request enable bit
Trigger interrupt request enable bit
https://github.com/cmsis-svd/cmsis-svd-data