Regviz

Fujitsu /MB9BF42xS /CRG /APBC0_PSR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as APBC0_PSR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Fujitsu/MB9AFB4xM/CRG/APBC0_PSR#0x0

7 43 0 0 00 0 0 0 0 0 0 0 0APBC0

Description

APB0 Prescaler Register

Fields

APBC0

APB0 bus clock frequency division ratio setting bit

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data