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Fujitsu /MB9BF50xN /GPIO /PFR4

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Interpret as PFR4

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https://regviz.com/r/Spansion/MB9BF40xR/GPIO/PFR4#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (P0)P0 0 (P1)P1 0 (P2)P2 0 (P3)P3 0 (P4)P4 0 (P5)P5 0 (P6)P6 0 (P7)P7 0 (P8)P8 0 (P9)P9 0 (PA)PA 0 (PB)PB 0 (PC)PC 0 (PD)PD 0 (PE)PE

Description

Port function setting register 4

Fields

P0

Bit0 of PFR4
P1

Bit1 of PFR4
P2

Bit2 of PFR4
P3

Bit3 of PFR4
P4

Bit4 of PFR4
P5

Bit5 of PFR4
P6

Bit6 of PFR4
P7

Bit7 of PFR4
P8

Bit8 of PFR4
P9

Bit9 of PFR4
PA

Bit10 of PFR4
PB

Bit11 of PFR4
PC

Bit12 of PFR4
PD

Bit13 of PFR4
PE

Bit14 of PFR4

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data