Fujitsu /MB9BF52xS /DMAC /DMACB0

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as DMACB0

31282724232019161512118743000000000000000000000000000000000000000000 (EM)EM0SS0 (CI)CI0 (EI)EI0 (RD)RD0 (RS)RS0 (RC)RC0 (FD)FD0 (FS)FS0TW0MS

Description

Configuration B Register

Fields

EM

Enable bit Mask (EB bit clear mask)

SS

Stop Status (stop status notification)

CI

Completion Interrupt (successful transfer completion interrupt enable)

EI

Error Interrupt (unsuccessful transfer completion interrupt enable)

RD

Reload Destination

RS

Reload Source

RC

Reload Count (BC/TC reload)

FD

Fixed Destination

FS

Fixed Source

TW

Transfer Width

MS

Mode Select

Links

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