Fujitsu /S6E2CC /MFT0 /WFG_WFSA10

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Interpret as WFG_WFSA10

15 1211 87 43 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0DCK0TMD0GTEN 0PSEL 0PGEN 0DMOD

Description

WFG Control Register A for WFG ch.0/1

Fields

DCK

set the count clock cycle for the WFG timer and Pulse counter

TMD

select the WFG’s operation mode

GTEN

selects the output conditions for the CH_GATE output signal of the WFG

PSEL

select the PPG timer unit to be used for each channel of the WFG

PGEN

specifies how to reflect the CH_PPG signal for each channel of the WFG

DMOD

1specifies polarity for RTO(0) and RTO(1) signal outputs

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