Regviz

Infineon /IMM100A /DAC0 /GLOBCLK

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as GLOBCLK

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Infineon/IMC300A/DAC/GLOBCLK#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (value1)FCLK_PS0 (value1)BCS

FCLK_PS=value1, BCS=value1

Description

Global Clock

Fields

FCLK_PS

Fast Clock Prescaler Factor

0 (value1): No clock

1 (value2): Divide by 1

4095 (value3): Divide by 4095
BCS

Bit-Clock Selector

0 (value1): Normal Mode: DAC_bclk is generated from DAC_fclk by a division of 4

1 (value2): Fast Mode: DAC_bclk is the same as DAC_fclk

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data