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Infineon /IMM100A /PORT3 /OMR

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Interpret as OMR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PS0)PS0 0 (PS1)PS1 0 (PS2)PS2 0 (PS3)PS3 0 (PS4)PS4 0 (PR0)PR0 0 (PR1)PR1 0 (PR2)PR2 0 (PR3)PR3 0 (PR4)PR4

Description

Port 3 Output Modification Register

Fields

PS0

Port 3 Set Bit 0
PS1

Port 3 Set Bit 1
PS2

Port 3 Set Bit 2
PS3

Port 3 Set Bit 3
PS4

Port 3 Set Bit 4
PR0

Port 3 Reset Bit 0
PR1

Port 3 Reset Bit 1
PR2

Port 3 Reset Bit 2
PR3

Port 3 Reset Bit 3
PR4

Port 3 Reset Bit 4

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data