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Infineon /XMC1200 /PPB /SHCSR

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Interpret as SHCSR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (value1)SVCALLPENDED

SVCALLPENDED=value1

Description

System Handler Control and State Register

Fields

SVCALLPENDED

SVCall Pending bit

0 (value1): SVCall is not pending.

1 (value2): SVCall is pending.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data