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Infineon /XMC1200 /USIC0_CH0 /FDR

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Interpret as FDR

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https://regviz.com/r/Infineon/XMC1400/USIC0_CH0/FDR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0STEP0 (value1)DM0RESULT

DM=value1

Description

Fractional Divider Register

Fields

STEP

Step Value
DM

Divider Mode

0 (value1): The divider is switched off, fFD = 0.

1 (value2): Normal divider mode selected.

2 (value3): Fractional divider mode selected.

3 (value4): The divider is switched off, fFD = 0.
RESULT

Result Value

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data