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Infineon /XMC1300 /CCU40 /GCSS

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Interpret as GCSS

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https://regviz.com/r/Infineon/XMC4800/CCU40/GCSS#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (S0SE)S0SE 0 (S0DSE)S0DSE 0 (S0PSE)S0PSE 0 (S1SE)S1SE 0 (S1DSE)S1DSE 0 (S1PSE)S1PSE 0 (S2SE)S2SE 0 (S2DSE)S2DSE 0 (S2PSE)S2PSE 0 (S3SE)S3SE 0 (S3DSE)S3DSE 0 (S3PSE)S3PSE 0 (S0STS)S0STS 0 (S1STS)S1STS 0 (S2STS)S2STS 0 (S3STS)S3STS

Description

Global Channel Set

Fields

S0SE

Slice 0 shadow transfer set enable
S0DSE

Slice 0 Dither shadow transfer set enable
S0PSE

Slice 0 Prescaler shadow transfer set enable
S1SE

Slice 1 shadow transfer set enable
S1DSE

Slice 1 Dither shadow transfer set enable
S1PSE

Slice 1 Prescaler shadow transfer set enable
S2SE

Slice 2 shadow transfer set enable
S2DSE

Slice 2 Dither shadow transfer set enable
S2PSE

Slice 2 Prescaler shadow transfer set enable
S3SE

Slice 3 shadow transfer set enable
S3DSE

Slice 3 Dither shadow transfer set enable
S3PSE

Slice 3 Prescaler shadow transfer set enable
S0STS

Slice 0 status bit set
S1STS

Slice 1 status bit set
S2STS

Slice 2 status bit set
S3STS

Slice 3 status bit set

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data