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Infineon /XMC1300 /CCU80_CC80 /TCCLR

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Interpret as TCCLR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TRBC)TRBC 0 (TCC)TCC 0 (DITC)DITC 0 (DTC1C)DTC1C 0 (DTC2C)DTC2C

Description

Slice Timer Clear

Fields

TRBC

Timer Run Bit Clear
TCC

Timer Clear
DITC

Dither Counter Clear
DTC1C

Dead Time Counter 1 Clear
DTC2C

Dead Time Counter 2 Clear

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data