Infineon /XMC1300 /MATH /EVFSR

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Interpret as EVFSR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (value1)DIVEOCS 0 (value1)DIVERRS 0 (value1)CDEOCS 0 (value1)CDERRS

CDERRS=value1, CDEOCS=value1, DIVEOCS=value1, DIVERRS=value1

Description

Event Flag Set Register

Fields

DIVEOCS

Divider End of Calculation Event Flag Set

0 (value1): No effect.

1 (value2): Sets the Divider end of calculation event flag in EVFR register. Interrupt will be generated if enabled in EVIER register.

DIVERRS

Divider Error Event Flag Set

0 (value1): No effect.

1 (value2): Sets the Divider error event flag in EVFR register. Interrupt will be generated if enabled in EVIER register.

CDEOCS

CORDIC Event Flag Set

0 (value1): No effect.

1 (value2): Sets the CORDIC end of calculation event flag in EVFR register. Interrupt will be generated if enabled in EVIER register.

CDERRS

CORDIC Error Event Flag Set

0 (value1): No effect.

1 (value2): Sets the CORDIC error event flag in EVFR register. Interrupt will be generated if enabled in EVIER register.

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