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Infineon /XMC1300 /PAU /RAM0SIZE

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Interpret as RAM0SIZE

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https://regviz.com/r/Infineon/XMC1200/PAU/RAM0SIZE#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0ADDR

Description

RAM0 Size Register

Fields

ADDR

RAM0 Size

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data