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Infineon /XMC1300 /PORT0 /PDISC

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Interpret as PDISC

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https://regviz.com/r/Infineon/XMC1200/PORT0/PDISC#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (value1)PDIS0 0 (value1)PDIS1 0 (value1)PDIS2 0 (value1)PDIS3 0 (value1)PDIS4 0 (value1)PDIS5 0 (value1)PDIS6 0 (value1)PDIS7 0 (value1)PDIS8 0 (value1)PDIS9 0 (value1)PDIS10 0 (value1)PDIS11 0 (value1)PDIS12 0 (value1)PDIS13 0 (value1)PDIS14 0 (value1)PDIS15

PDIS7=value1, PDIS0=value1, PDIS13=value1, PDIS3=value1, PDIS12=value1, PDIS11=value1, PDIS2=value1, PDIS8=value1, PDIS10=value1, PDIS1=value1, PDIS15=value1, PDIS14=value1, PDIS9=value1, PDIS6=value1, PDIS5=value1, PDIS4=value1

Description

Port 0 Pin Function Decision Control Register

Fields

PDIS0

Pad Disable for Port 0 Pin 0

0 (value1): Pad P0.x is enabled.

1 (value2): Pad P0.x is disabled.
PDIS1

Pad Disable for Port 0 Pin 1

0 (value1): Pad P0.x is enabled.

1 (value2): Pad P0.x is disabled.
PDIS2

Pad Disable for Port 0 Pin 2

0 (value1): Pad P0.x is enabled.

1 (value2): Pad P0.x is disabled.
PDIS3

Pad Disable for Port 0 Pin 3

0 (value1): Pad P0.x is enabled.

1 (value2): Pad P0.x is disabled.
PDIS4

Pad Disable for Port 0 Pin 4

0 (value1): Pad P0.x is enabled.

1 (value2): Pad P0.x is disabled.
PDIS5

Pad Disable for Port 0 Pin 5

0 (value1): Pad P0.x is enabled.

1 (value2): Pad P0.x is disabled.
PDIS6

Pad Disable for Port 0 Pin 6

0 (value1): Pad P0.x is enabled.

1 (value2): Pad P0.x is disabled.
PDIS7

Pad Disable for Port 0 Pin 7

0 (value1): Pad P0.x is enabled.

1 (value2): Pad P0.x is disabled.
PDIS8

Pad Disable for Port 0 Pin 8

0 (value1): Pad P0.x is enabled.

1 (value2): Pad P0.x is disabled.
PDIS9

Pad Disable for Port 0 Pin 9

0 (value1): Pad P0.x is enabled.

1 (value2): Pad P0.x is disabled.
PDIS10

Pad Disable for Port 0 Pin 10

0 (value1): Pad P0.x is enabled.

1 (value2): Pad P0.x is disabled.
PDIS11

Pad Disable for Port 0 Pin 11

0 (value1): Pad P0.x is enabled.

1 (value2): Pad P0.x is disabled.
PDIS12

Pad Disable for Port 0 Pin 12

0 (value1): Pad P0.x is enabled.

1 (value2): Pad P0.x is disabled.
PDIS13

Pad Disable for Port 0 Pin 13

0 (value1): Pad P0.x is enabled.

1 (value2): Pad P0.x is disabled.
PDIS14

Pad Disable for Port 0 Pin 14

0 (value1): Pad P0.x is enabled.

1 (value2): Pad P0.x is disabled.
PDIS15

Pad Disable for Port 0 Pin 15

0 (value1): Pad P0.x is enabled.

1 (value2): Pad P0.x is disabled.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data